VIN This is the main power supply connection,and it should be powered at 2.5 V to 5.5 V.
The SCL/SPC and SDA/SDI level shifters pull the IÂ˛C and SPI bus high bits up to this level.
GND The ground (0 V) connection for your power supply.
Your IÂ˛C or SPI control source must also share a common ground with this board.
SCL/SPC Level-shifted IÂ˛C/SPI clock line: HIGH is VIN, LOW is 0 V
SDA/SDI Level-shifted IÂ˛C data line and SPI data-in line (also doubles as SDO in 3-wire mode): HIGH is VIN,
LOW is 0 V
SDO SPI data-out line in 4-wire mode: HIGH is VDD, LOW is 0 V. Also used as a 3.3V-logic-level input
to determine IÂ˛C slave address (see below). This pin is not level-shifted and is not 5V-tolerant.
CS SPI enable (chip select). Pulled up to VDD to enable IÂ˛C communication by default
L3GD20H 3-Axis Gyro Carrier with Voltage Regulator SPI & I2C up to Â±20 TOP