CY7C68013A-56 chip: low-power version of the enhanced 51-core, 16KB program data areas, clocked at 48Mhz, 480Mbps high-speed transmission protocol standards, in line with USB2.0 specification, backward compatible with USB1.1.
Firmware, EEPROM: complete the program in-system programming directly with a USB cable to download the firmware, on-board to provide 16K (24LC128) a large program memory (EEPROM), used as storage VID / PID and the USB firmware, the program space to meet the CY7C68013A need.
All GPIO After 2.54mm standard pin lead out, the great convenience learners expand their own design. With corresponding firmware can be achieved through the core board logic analyzer function. Provide the PDF principle diagram and related source