Atmel AVR JTAG is the company's AVR Studio's on-chip debugging tools, it has JTAG interface and supports all AVR 8-bit RISC instruction which has a standard JTAG interface. 4-wire JTAG interface is a standards-compliant IEEE 1149.1 test access port (TAP) controller. IEEE standards board to provide an effective test of the standard method of connectivity (Boundary Scan). Atmel's AVR devices has been extended to support full programming and on-chip debugging functions. AVR JTAG emulator chip used for hardware emulation, such as single-step program execution, set breakpoints, etc., through hardware simulation program which can understand the details of the chip operation. AVR JTAG Emulator is mainly used to simulate the operation of the chip.